As is known, integrated circuits use built-in self-test (“BIST”) circuitry for testing. However, using BIST circuitry for testing memory cells, such as for example thinly-capacitively-coupled thyristor (“TCCT”) memory cells, has heretofore not provided sufficient programmability and granularity.
Accordingly, it would be desirable and useful to provide programmable BIST (“PBIST”) circuitry for testing TCCT memory cells with enhanced granularity.